Minisymposium (ID: SS-HPC)
High Performance Computing: From Models of Computation to Applications
Organizers: Marc Moreno Maza and Yuzhen Xie (Department of Computer Science, University of Western Ontario)
Today's parallel hardware architectures (multicores, graphics processing units, etc.) and computer memory hierarchies (from processor registers to hard disks via successive cache memories) enforce revisiting many fundamental algorithms which were often designed with algebraic complexity as the main complexity measure and with sequential running time as the main performance counter.
Indeed, on modern computers minimizing the number of arithmetic operations is no longer the primary factor affecting performance. Effective utilization of the underlying architecture (increasing the amount of instruction level parallelism, better utilizing the memory hierarchy, etc.) can be much more important. Many examples exist where algorithms that use more arithmetic operations outperform algorithms with fewer arithmetic operations.
Topics of this special session includes theoretical tools (cache complexity, multithreaded parallelism, space-time tradeoffs, code optimization for parallelism and locality, etc.) that are adapted for taking best advantage of parallel architectures and hierarchical memories. Applications of these models in all areas of mathematical sciences and reports comparing implementation techniques of a given algorithm on different hardware architectures (multicores, GPGPUs) would also be of great interest.
More on this Minisymposium (follow this link)
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